LEON3: 32-bit Softcore FPGA processor of SPARC architecture
This seminar was recently presented by V. Nikonov, member of our firmware engineering team.
LEON3: 32-bit Softcore FPGA processor of SPARC architecture
- General overview of Sparc v8 processor architecture
- LEON3 implementation by AeroFlex Gaisler
- GRLIB IP Library for LEON3
- Using Eclipse IDE along with GRMON monitor
- GRSIM and TSIM simulators
- U-boot: compilation, configuration for LEON3, loading into RAM via JTAG
- Linux: compilation, configuration, customization for LEON3, loading via tftp
- Comparing LEON3 to other soft-core processors
- Summary